Sym3 Z Magnum Etch 

As AI and high‑performance computing push device architectures toward gate‑all‑around (GAA) and eventually CFET designs, the performance of advanced logic increasingly depends on the precision of source‑and‑drain cavity shaping. These cavities must be formed with highly vertical sidewalls, uniform dimensions, and rectangular bottoms to support void‑free epitaxy and maximize nanosheet‑to‑epi contact. Small deviations in cavity profile or depth variation can disrupt epitaxial growth and reduce drive current, making cavity etch one of the most sensitive and performance‑critical steps in GAA fabrication.

The Sym3^™ Z Magnum^™ Etch system directly addresses these scaling challenges through its advanced plasma architecture and second‑generation Pulsed Voltage Technology (PVT2) combined with independent RF bias control. By generating plasma close to the wafer and delivering highly controlled ion energy, Sym3 Z Magnum achieves industry‑leading verticality, bottom‑shape definition, and Si/SiGe selectivity. These capabilities enable uniform, rectangular‑bottom S/D cavities with the lowest feature‑to-feature depth variation, improving nanosheet consistency and supporting transistor performance at leading nodes. The Sym3 Z family is already widely adopted by major foundry, logic, and memory customers for critical cavity‑etch steps.

As transistor architectures evolve toward tighter pitches, deeper cavities, and more 3D‑integrated device structures, the demands on etch precision and profile control will only intensify. The Sym3 Z Magnum system is designed to meet these future requirements, with an architecture that scales across GAA, CFET, and advanced memory applications. Building on the historic success of the Sym3 family – the fastest‑ramping product line in Applied’s history – Sym3 Z Magnum provides the performance foundation needed to extend logic scaling well into the next generation.