As AI drives demand for greater compute, a leading‑edge chip now in development can integrate over 300 billion transistors into an area little larger than a postage stamp. Success increasingly hinges on deploying the right transistors in the right places. That level of on‑chip customization demands extraordinary control over transistor materials, executed consistently across billions of devices. 

As the industry transitions to Gate‑All‑Around (GAA) transistors—advanced 3D architectures that deliver higher logic density and better performance than FinFET transistors—that need for precision only intensifies. This is where Applied Materials plays a critical role. The Endura™ Trillium™ ALD system enables chipmakers to precisely tailor key materials in GAA transistors—tuning behavior for different workloads without compromising leading-edge manufacturability.
 

Why transistor customization is essential 

There is no one‑size‑fits‑all transistor. Some are optimized to switch extremely fast for maximum performance, while others are designed to minimize power draw when idle. Designers manage the trade-off by tuning threshold voltage (Vt)—the transistor’s turn‑on point, or the amount of electrical push required before current begins to flow.

By mixing these different “flavors” across a chip, designers can create systems that strike the targeted balance between performance and energy efficiency.

• Higher-Vt transistors are harder to turn on but leak less current when off, improving energy efficiency. Mobile chips typically use a higher share of them to reduce standby power and extend battery life. 
• Lower-Vt transistors turn on more easily and switch faster, boosting performance but at the expense of higher leakage power. AI accelerators and data‑center processors use more of them in compute‑critical paths, while placing higher‑Vt devices elsewhere to keep power in check.

Flexibility through gate‑stack engineering

As chips incorporate a wider mix of tailored transistor types, precise Vt control becomes a crucial differentiator. In GAA transistors, Vt is set by the gate, which wraps around the nanosheet channels and regulates current flow.

These capabilities were proven during earlier 3D inflections, including the industry’s transition to FinFETs, where uniform, conformal gate coverage became essential. GAA transistors introduce new space constraints: as many as five gate stack layers are packed into the ~10nm space—about 1/10,000th the width of a human hair—between silicon nanosheets. To meet the extreme confines of the GAA era, Trillium adds advanced capabilities such as metal‑layer thickness scaling and volume-less dipole films.