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Shaping and removing materials is becoming increasingly critical. It takes precision to remove targeted atoms without removing or damaging the remainder of the target film along with adjacent films and structures.
Conductor etch removes conducting and semiconductor materials, such as metals and silicon, deposited during the device fabrication process. Dielectric etch removes insulating films, which tend to have stronger atomic bonds and require higher energies. Both typically employ reactive ion etch in which reactive chemistries and high-energy ions bombard the wafer surface to create holes, lines, and shapes. Atomic layer etching with its low ion energy is emerging as device dimensions shrink and precise shaping of small, densely packed structures becomes more difficult. In contrast, etching contacts in increasingly high aspect ratio NAND structures is requiring higher ion energies.
Selective removal uses radical-based chemistries to remove a target material without damaging surrounding materials and can work even when there is no line of sight. Selective removal technology provides new degrees of freedom in shaping complex vertical structures like finFETs, 3D NAND memory arrays and emerging gate-all-around transistors.
Chemical mechanical planarization (CMP) is a physical polishing technology that leverages chemistry and abrasives to quickly and precisely remove targeted metal and dielectric films, leaving a strong, uniform, and planar foundation for subsequent process steps. CMP is critical in the creation of vertical structures as these structures require an excellent base to build upon.