Reducing Gate Oxide Uniformity Drift in RTP Tools
Improves Quality, Yield and Cycle Time
Ryoto Kojima, Fujitsu Semiconductor, Ltd., and Manjunath Yedatore, Applied Materials, Inc.
Collaborative work between Fujitsu Semiconductor and Applied Materials on RTP tool performance resulted in the development of a tool health indicator that can predict the need for maintenance, helping improve yield and cycle time and reducing scrap and usage of non-product wafers. Efforts to increase the accuracy of a virtual metrology model following maintenance events also improved uniformity control and product quality.
Rapid thermal oxidation (RTO) is a process used to grow ultrathin oxide films. RTO causes the thermal oxidation of any exposed silicon and, when carried out in a N2O environment, incorporates nitrogen into the grown oxides. RTO is most commonly applied to high-speed CMOS logic gate dielectrics of approximately 20–80 Å. There are two variants of the RTO process: dry oxidation (dry ox) and wet oxidation (wet ox). Wet ox is more commonly referred to as in-situ steam generation (ISSG).
RTO using ISSG yields the same results as dry oxidation, but with lower stress and fewer defects. Additionally, ISSG oxide is grown at rates much higher than through dry oxidation. The primary gases used in the ISSG process are O2 and hydrogen (H2 ). These gases bond together under high temperatures in the process chamber to create water in the form of steam. The process of mixing a hydride and oxide together under high temperatures can be extremely dangerous, so the ISSG process must have its parameters tightly controlled. This is critical for the ratios and pressures at which the H2 and O2 are mixed.
The three ISSG process classifications are determined by the desired application result: thick, mid, and thin. Thick ISSG is used in processe where an oxide thickness of >70 Å is required. Thick ISSG uses process temperatures of >1000°C. Mid ISSG is used where an oxide thickness of 30–70 Å is needed and uses temperatures in the range of 950–1050°C. Thin ISSG is used for oxide thickness of < 30 Å and typically requires a temperature range of 850–950°C.
One of the most critical parts of the RTO chamber is the reflector plate. It is an integral part of the temperature control system. The high reflectivity of the reflector plate improves the emissivity and temperature readings the probes receive. The temperature probes are installed into the reflector plate, lying flush with the reflector plate surface. Temperature sensors in the Applied Radiance chamber are referred to by the following names: temperature probes, pyrometers and thermometers. Regardless of what they are called, they detect radiated energy and convert this energy to an electrical signal, which represents the amount of energy detected. Within the process chamber this energy is characterized as heat and the energy measured corresponds to temperature.
During wafer production it is extremely critical that the temperature probes be perfectly clean so that the feedback from the probes back to the lamps via the real-time controller (RTC) is consistent from wafer to wafer (see figure 1). However, it is fairly common for debris to accumulate on the reflector plate (and thus the surface of the temperature probe), causing a shift on the actual lamp power and resulting in a drift in the thickness and thickness uniformity of the gate oxide. When the thickness uniformity drifts outside of the statistical process control (SPC) limits, a wet clean is required to “reset” the feedback from the temperature probes back to the lamps.
It is critical to optimize the frequency of these wet cleans to maximize tool uptime and productivity. One method commonly utilized to combat the high frequency of wet cleans is a temperature offset. These offsets are incorporated into the system software to compensate for the debris accumulation and adjust the lamp power to bring the thickness uniformity back to within specification. However, it is important to monitor the thickness uniformity in “near real time” and proactively determine the need for incorporating a temperature offset. This will minimize wafer-to-wafer variability and improve process control (see figure 2).
Figure 1. RTO temperature control system.
Figure 2: Illustration of thickness uniformity drift between maintenance events.
DEVELOPING AN IMPROVED MODEL FOR PREDICTING THICKNESS UNIFORMITY
Key sources of cost-of-ownership (COO) improvement in RTP tools are (1) monitoring and maintaining uniformity within SPC limits without increasing cycle time and (2) minimizing the number of wet clean maintenance events.
To address the first opportunity, the Fujitsu team worked with Applied Materials, utilizing eDiagnostics to monitor sensor (SVID) data and predict thickness uniformity using a model that converts the SVID data measurements to a thickness uniformity measurement. This process is called “virtual metrology” and has the advantage of providing uniformity measurement information without the cost (cycle time and capital) of metrology.
The virtual metrology model was developed using multivariate analysis. The model used linear regression equations consisting of the lamp powers of each of the zones. Although it provided valuable insight into the concept and feasibility of this work, it was not sufficiently robust to forecast maintenance events; for example, the prediction quality dropped significantly after a maintenance event and the model had to be retuned (see figure 3). An investigation that involved bringing together analytics and tool experts revealed that temperature misreading by the pyrometers (see figure 1) due to film build-up was the primary source of error.
As a result, the joint team recognized the importance of incorporating the temperature offset data into the new model. After analyzing the contributions and the weighting of the various lamp powers and the temperature offset, the coefficients and the final equations were modified.
The general trend of the old and new models consisting of the lamp power and temperature offset data is as follows:
Old model: Uniformity = a1 x LP1 + a2 x LP2 … + a7 x LP7 + b
New model: Uniformity = a1 x (LP1−TO1) + a2 x ( LP2−LP2)… + a7 x (LP7−TO7) + b
The optimization of the model was conducted utilizing data from wafers run on half the chambers in the fleet. Testing was then conducted on a complementary data set, i.e., wafers run on the remaining chambers in the fleet. The model was then implemented and released into production. Regular testing and validations are performed on the model to ensure its robustness.
Figure 3: Illustration of improvement in ability to predict uniformity following maintenance events using the new model.
RESULT #1: IMPROVED UNIFORMITY VIRTUAL METROLOGY MODEL
The results with the new model were significantly better, with the calculated residual errors being under control. Data trends from the “old” and the “new” models are shown in figure 3. Note that significant improvement occurred directly after maintenance events. The improved model results in a better capability to predict and control uniformity; this, in turn, results in higher yield, reduced scrap, reduced non-product wafers, and faster cycle time.
RESULT #2: IMPROVED HEALTH MONITORING FOR MAINTENANCE PREDICTION
A multivariate health index model was also developed for this tool-type. The model uses Hotelling’s T2 with the same lamp powers for each zone as were used in the virtual metrology model as inputs. The model measures the deviation of the tool health from the normal condition. It is capable of providing early detection of maintenance events as shown in figure 4. The rising trend of the health index corresponds to the rising nonuniformity. As a result, the maintenance cycle can be optimized, resulting in a tool downtime reduction of 150 hours per tool per year.
Figure 4: Tool health model predicts the need for maintenance; improved maintenance timing results in improved yield, reduced scrap, reduced non- product wafers, and reduced cycle time.
The current modified multivariate virtual metrology models predict the thickness uniformity of wafers monitored during production and across maintenance cycles, improving yield, reducing scrap and non-product wafers, and accelerating cycle time. Additionally, a multivariate tool health model provides valuable early indication of drifts, enabling more optimized maintenance schedules and ultimately resulting in reduced tool downtime across the fleet. Further work is underway to enhance the accuracy of the models to increase predictive reliability and potentially reduce the frequency of metrology measurement.
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Thanks to the following individuals for their contributions to this article:
Erika Hayashimoto, Fujitsu Semiconductor, Ltd.
Takahiro Tsuchiya, Fujitsu Semiconductor, Ltd.
Jimmy Iskandar, Applied Materials
Yuichi Tachino, Applied Materials
Takashi Watanabe, Applied Materials
 Ryota Kojima, Takashi Watanabe “Reducing Gate Oxide Uniformity Drift and Optimizing PM Cycle Time in RTP Tools Using Principle Component Analysis and Virtual Metrology,” APC Conference XXVI, Ann Arbor, Michigan, September 2014.