Endura Avenir RF PVD

As devices scale down, greater feature fragility and higher aspect ratios are making it more difficult for current physical vapor deposition PVD technology fill narrow, deep structures and to avoid plasma damage. Using low-power, RF-based plasma minimizes the risk of damage and achieves more uniform plasma density distribution that results in better bottom coverage and uniformity.

First introduced for high-k/metal gate applications, The Endura Avenir system's RF PVD technology is now expanded to offer customers a uniquely production-worthy path for extending PVD for logic contact silicidation to 22nm and beyond.

For high-k/metal transistors, the Avenir system offers solutions for both gate-first and gate-last integration schemes, enabling chipmakers to transition easily between the two approaches. For gate-first, the RF PVD technology enables the controlled deposition of highly uniform and continuous thin films (<10Å).  For gate-last, high-pressure, capacitively coupled plasma operation is used to ensure good bottom coverage and minimal overhang. The system's RF PVD technology also minimizes the risk of damage when depositing ultra-thin cap layers and metal gate films, delivering abrupt interfaces free of charge traps. The system’s tuning capabilities enable precise stoichiometric control of TiN films for overall Vt control without sacrificing film uniformity. In terms of effective work function, this requirement translates into <4.2eV for NMOS and >5.0eV for PMOS for high performance.

For high aspect ratio Ni(Pt) logic contact silicidation, the system operates in high-pressure, capacitively coupled plasma mode that produces higher metal ionization density and hence better bottom coverage. The RF PVD silicidation chamber doubles the bottom coverage obtained with existing PVD Ni(Pt) processes, achieving more than 70% of the field thickness at the bottom of 5:1 aspect ratio features and uniform bottom coverage within feature and center-to-edge across the wafer. Uniform bottom coverage (3%, 1σ) translates into uniform resistance and lower leakage, while high platinum compositional uniformity translates into high device yield. The system delivers this performance at 30% lower cost of consumables than current PVD Ni(Pt) technology.

The production-proven Endura platform offers uniquely integrated capabilities for high-k/metal gate and logic contact silicidation applications. For gate applications, it offers the full range of PVD, chemical vapor deposition, and atomic layer deposition technologies. For contacts, it combines the Siconi pre-clean, silicidation, and titanium nitride capping processes.

• Endura Avenir NiPt Technical Briefing (1.4MB, PDF)

Articles

• Enabling Metal Deposition Technology for High-K Metal Gate Integration, Advanced Metallization Conference Proceedings, September 2008. (1.6MB, PDF)
• Enabling Effective Work Function Tuning by RFPVD metal oxide on High-k Gate Dielectric, 213th Electrochemical Society Meeting. * (152kB, PDF)
• High-k / Metal Gate Stacks in Gate First and Replacement Gate Schemes, Advanced Semiconductor Manufacturing Conference, July 2010. ** (689kB, PDF)

* © The Electrochemical Society

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