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Applied Materials is at the forefront of strain solutions, offering the broadest range of reliable, manufacturable applications to boost NMOS and PMOS device performance. Delivering a complete suite of strain-inducing processes, Applied Materials provides epitaxial, compressive/tensile nitride and tensile oxide solutions to address source/drain, etch stop layer (ESL), pre-metal dielecric (PMD) and shallow trench isolation (STI) applications. (see related links for specific products.)
In Logic, strain engineering boosts device performance. The silicon atoms in the channel are displaced, or "strained," in the lattice by as much as 4%, improving the mobility of electrons and holes and increasing drive current. In PMOS, selective SiGe epi for recessed source/drain induces channel strain and improves drive current >60%. When combined with compressive stress nitride as the etch stop layer, the additive effects are tremendous, increasing drive current >85%.
While enhancing mobility in Logic, strain also addresses other key scaling challenges in non-volatile memory, such as the need to reduce leakage current to improve charge storage and retention. Strain introduced in the NVM cell can dramatically reduce leakage, as well as improve drive current for faster read times, pushing out the scaling limits of conventional floating gate flash technology.
Strain News Features:
Strain engineering push to the 32nm logic technology node, Semiconductor Fabtech, 32nd Edition, January 2007 (1.20MB)
200% pMOSFET Mobility Gain with Strain, Semiconductor International, September 2006 (294KB)
pMOSFET With 200% Mobility Enhancement Induced by Multiple Stressors, EEE Electron Device Letters, Vol.27, No.6, June 2006 (235KB)
Strain Engineering in Non-Volatile Memories, Semiconductor International, April 2006†
Strain Engineering: Helping Transistors Scale Beyond 90nm, Semiconductor Manufacturing, March 2005 (619KB)
Strained Silicon Engineering Leads Field of Transistor Technology Improvements, MICRO Magazine, March 2005†
Related Press Releases:
eHARP System Extends Production-Proven STI Gap-Fill Technology to 32nm and Beyond
Releases Industry's Most Advanced Strain Engineering Technology to Boost 45nm Transistor Speed
Collaboration with IMEC to Develop 45nm Transistor Technologies
† You will be leaving the Applied Materials Web site. The content of the third party Web site is not controlled by Applied Materials and this link is provided solely for your convenience.
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