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Front End Products
Thermal Processing Takes on New Materials, Lower Temps, Semiconductor International, October 2006 (1066KB)
Single-Wafer Thermal Processing---Industry Transition to Single Wafer is Happening Now (37KB)
Gate Stack
Production of Silicon Oxide-Nitride Films with an Integrated 300 mm Single-Wafer System for Sub-90 nm Front-End-of-Line Spacer Application, Semiconductor Manufacturing Magazine, August 2004 (353KB)
Further optimization of plasma nitridation of ultra-thin oxides for 65nm MOSFE, Semiconductor Fabtech 23rd Addition, July 2004 (317KB)
Ultra Thin NO/N2O Oxynitride Dielectric for Advanced Flash Memory Application: Single-Wafer and Batch Technology (660KB)
Substrate
Strained Silicon for 45nm, Semiconductor International, March 2007 (1.2MB)
200% pMOSFET Mobility Gain with Strain, Semiconductor International, September 2006 (294KB)
Production Processes for Inducing Strain in CMOS Channels, Semiconductor Fabtech, 26th Edition (322KB)
Strain Engineering: Helping Transistors Scale Beyond 90nm, Semiconductor Manufacturing, March 2005 (619KB)
A Systematic Study of Trade-offs in Engineering a Locally Strained pMOSFET, F. Nouri, Et al., 2004 IEEE International Electron Devices Meeting, December 2004 (1.91MB)
'Strain' in silicon may also show in the flow, EETimes, December 2004†
IEDM panel mulls state of strained MOSFETs, EETimes, December 2004†
Strain Equals Gain: The New Face of Silicon, Semiconductor International, December Issue†
What’s Next After Strained Silicon?, Electronic News, December 2004†
Analyzing Strained-Silicon Options for Stress-Engineering Transistors, Solid State Technology, July 2004 (104KB)
35% Drive Current Improvement from Recessed-SiGe Drain Extension on 37nm Gate Length PMOS, 2004 IEEE Symposium proceedings on VLSI Technology, 2004 (467KB)
Selective epitaxy removes roadblocks in the quest for speed, Semiconductor Fabtech 21st Edition (329KB)
Ultra Shallow Junction
Meeting Future SDE Requirements Using Co-Implants and RTA, Solid State Technology, October 2006 (413KB) Extending Existing Fab Equipment for 65nm Node Ultra-Shallow Junction Formation, Semiconductor Manufacturing, August 2005 (896KB)
Low-temp Spike Anneal for NiSi, Solid State Technology, October 2004 (224KB)
Quantum High Current Implanter Adds X Factor for Single Wafer Transition at 65nm, Semiconductor Fabtech 24th Eddition, 2004 (179KB)
Beyond the 100nm node: Single-Wafer RTP, Solid State Technology, May 2003 (105KB)
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