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Front End Products
Integrating High-K Dielectric Gates in Sub-65nm Structures, Semiconductor Manufacturing, November 2003 (585KB)
Applied Centura DPS Etch - DPS II for Silicon Applications
Enhancing Process Control Flexibility for Sub-90nm Applications, Fabtech 25th Addition, February 2005 (1.80MB)
Advanced Etch Applications Using Tool-Level Data, Solid State Technology, June 2004 (127KB)
Developing a WSix Gate Etch Process with CD Bias Uniformity less than 3nm, Future Fab, February 2004 (2.66MB)
Integrated Optical Metrology, Semiconductor International, June 2002 (448KB)
Applied Centura DPS Etch - DPS Plus for Metal Applications
No Technical Articles/Papers at this time.
Applied Centura DPS Etch - DPS Plus for Silicon Applications
No Technical Articles/Papers at this time.
Applied Centura eMAX Dielectric Etch
Bilayer Photo Resists – an Etch Perspective, European Semiconductor, April 2003 (664KB)
Integrated Process Control for Etch, Solid State Technology, April 2002 (190KB)
Physics and Process Drive Etch Performance at 45nm, Solid State Technology, March 2005 (330KB)
The Challenge of Etching 65nm Low-k Films, Semiconductor Magazine, July 2003 (190KB)
No Technical Articles/Papers at this time.
Applied Centura Transforma Silicon Etch
Enhancing Process Control Flexibility for Sub-90nm Applications, Semiconductor Fabtech 25th Addition, February 2005 (1.80MB)
Advanced Etch Applications Using Tool-Level Data, Solid State Technology, June 2004 (127KB)
Integrated Optical Metrology, Semiconductor International, June 2002 (448KB)
Applied Producer Dielectric Etch
No Technical Articles/Papers at this time.
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