The Applied VeritySEM 3 Metrology system delivers industry-leading precision along with the highest production throughput. The system measures 45nm gate, low-k and ArF resist features with 3Å precision—a requirement for 45nm device production. Its high throughput, advanced automation and within-nanometer tool matching virtually eliminate the need for tool operators and reduce the number of CD-SEM tools required per fab. The overall results are a boost in productivity and a reduction in capital investment.

The VeritySEM 3's OPC Check is a proven solution to automate the OPC (Optical Proximity Correction) mask qualification process. As chipmakers advance into 65nm technology node and beyond, OPC-enhanced features are commonly incorporated into mask design of all layers. Hundreds of CD measurements are then required to verify that the features printed on the wafer are indeed what the device designers intended to produce. With a suite of proprietary algorithms, OPC Check gets input from EDA design systems, automatically creates CD-SEM measurement recipes, then directs VeritySEM to measure thousands of sites in high throughput without operator assistance.

An advanced OPC Check through Edge Contour Extraction (ECE) is now available, significantly improves OPC modeling predictability. This enhanced capability is based on precise SEM based feature contour extraction overlaid accurately on the design intent. This feed to the EDA tool allows multiple 2D measurements per each feature set.

With proprietary SEM technology, electrons in the VeritySEM column move 50% faster than the previous generation platform, creating a narrow beam and small spot size that result in high resolution and tight ArF metrology. Innovative scanning method and local charge control compensation algorithms enable precise measurement of low-k and ArF resist features. Flexible beam currents provide a better signal-to-noise ratio, enabling faster, more robust pattern recognition and, ultimately, increased throughput.