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PANEL DISCUSSION
December 11, 2012
INTERCONNECT PERFORMANCE
Overcoming the Impact of
Transistor Scaling
Join Applied Materials and guest speakers from across the industry at the Hotel Nikko, San Francisco, for a lively discussion on challenges facing interconnect technologies. Can they keep pace with transistor scaling and the transition to 3D architectures?

The 14 nm node is likely to be the inflection point beyond which copper resistivity increases exponentially. How will circuit design and system architecture be able to address future limitations in interconnect performance? How will the complexity of multi-patterning and EUV impact interconnect pitch scaling? Will current integration schemes continue to scale or be replaced?
Hear answers to these questions and more from some of today's industry leaders.
Applied Materials looks forward to welcoming you!
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