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The Last Word

Never Say Never to Moore's Law

David Lammers

Ah, there is nothing like the future of Moore’s Law scaling to get the blood boiling, and the discussions at the recent Advanced Semiconductor Manufacturing Conference (ASMC 2016) in Saratoga Springs, New York were especially lively.

Dick James, senior fellow at ChipWorks, set the stage with a slide show of the leading-edge ICs his company has dissected recently. His talk—appropriately titled “Moore’s Law Continues Into the 1x-nm Era”—was worth the price of ASMC admission. Interestingly, James said that the FinFET-based devices ChipWorks has studied are remarkably the same, with roughly the same 40nm fin height. The FinFETs, which have all appeared in commercially available processors, showed “quite a bit of commonality,” he said, noting that Intel’s 14nm transistor does have a smaller gate length (22nm) than comparable devices from two foundries (28–30nm).

David Bloss, Vice President, Technology & Manufacturing Group; Director, Fab Equipment Supply Chain, Intel

James also made an important point: in recent technology generations, the leading-edge chips have succeeded in a roughly 50% areal shrink for the SRAM bit cells. At an ASMC panel discussion on the economics of Moore’s Law, Intel executive David Bloss expanded on the importance of the areal shrink. Without the ability to shrink the transistors for a “given amount of money,” he said, the economics of moving to the next technology node fall apart.

“If we don’t get the traditional [areal] scaling, this could break Moore’s Law,” said Bloss.

When Robert Maire, president of Semiconductor Advisors, asked the panelists if they agreed that the cost-per-transistor had flattened out beyond the 28nm node, Qualcomm’s Senior Director of Engineering William Miller begged to differ. “We might have seen a little bump in the road, but I think Moore’s Law scaling is solid to 7nm, and I would never say never about 5nm. I do believe it will continue, though 5nm might be difficult.”

Both Intel’s Bloss and Qualcomm’s Miller said the market will demand more highly integrated chips. By 2019, Miller predicted, 90% of all phones will be smartphones, and many of them will be based on octi-core processors. Bloss said those phones and all manner of other things will be constantly feeding data to the cloud, which will spur demand for processors.

Robert Maire, President of Semiconductor Advisors, LLC

“There will be massive data processing in the cloud. So much data will become available in the next five years, I can’t imagine smart people not trying to analyze and use that data,” said Bloss.

Patrick Martin, head of field technology at Applied Materials, said EUV is “mandatory” for successful scaling, especially for scaling the back-end-of-the-line (BEOL) interconnects. “EUV would take a lot of the cost out” and “play a role in [reducing] yield loss,” Martin said.

Qualcomm’s Miller put a lot of emphasis on packaging, especially system-in-packages (SIPs) and fan-out wafer level packaging, either of which will allow Qualcomm to combine several chips “in a quarter-sized package.”

William Miller, Senior Director of Engineering, Qualcomm

Two technical papers at ASMC 2016 stand out in my mind. And they both have a tangential relation to Moore’s Law.

One was presented by Christopher Carr, an Intel lithographer working at the Global 450mm Consortium in Albany, New York. Carr and his coauthors from Nikon Precision were forthright about the engineering challenges involved in getting Nikon’s 450mm immersion, 193nm wavelength scanner up to the overlay and other tool acceptance standards set by the 450 consortium.

A second notable paper that discussed through silicon via (TSV) process developments came from a team of GLOBALFOUNDRIES engineers. They noted that if packing in more transistors becomes problematic, the industry is likely to rev up its investments in 3D TSVs and 450mm manufacturing.

Carr said a 450mm wafer contains 212 “fields” compared with 96 comparable exposures on a 300mm wafer, holding out the promise of a 30% gain in return on investment (ROI) from the larger platters.

However, James Moyne, a professor at the University of Michigan said, “the semiconductor industry is no longer mainly about computing. There is a lot more going on in MEMS sensors and other devices which do not rely on advanced design rules. The industry is broadening out.”

ASMC 2016 showed plenty of ideas about how to gain cost-per-function improvements, which are, at the bottom line, the heart of Gordon Moore’s amazing prediction.

David Lammers is an Austin-based technology journalist.